As scaling of semiconductor devices proceeds, the problem of terrestrial neutron soft-error becomes obvious particularly with respect to SRAM (See Non-Patent Document 1). When neutrons of very high energy reach the earth and plunge into nuclei making up a device, nucleons (neutrons and protons) in the nuclei collide with one another repeatedly, and nucleons having particularly-high energies are released out of the nuclei.
As it comes to the point that nucleons cannot have kinetic energies enabling release from nuclei, there follows a process of evaporation of light particles such as protons, neutrons, deuterons and alpha particles from the residual nuclei in an excited state. Finally the residual nuclei have recoil energies too, and thus all of these secondary ions move within the device to distances corresponding to their ranges.
When secondary ions with charges pass through a depletion layer of a storage node in the “high” state in an SRAM, charges are collected in the storage node according to the funneling mechanism similarly to the case of the alpha-ray soft-error. When the collected charges become higher than the critical charge, the “high” state transitions to the “low” state, causing soft-error.
The above has been taken as a typical mechanism of the neutron soft-error. However, as scaling of SRAM proceeds to the level of about 100 nm, many modes that cannot be explained by this mechanism have been reported (See Non-Patent Documents 2-6, for example). Single Event Latch-up (SEL) is a representative example. According to the US standard JESD89-3, SEL is an error that cannot be restored by rewriting and is restored by power cycle (reactivation by turning on the power again). SEL is different from the conventional latch-up that can be, to some extent, taken as a hard error due to firing or meltdown.
There is a memory error mode that can be restored by resetting not by rewriting and is called Single Event Functional Interrupt (SEFI). This is considered as an error in a peripheral circuit. Each of SEL and SEFI is Multi Cell Upset (MCU, a phenomenon that one event causes errors in a plurality of bits). Multi-bit error in one word is highly critical since Error Checking and Correction (ECC) is practically ineffective, and it is called Multi Bit Upset (MBU) in distinction from MCU.